The Effects of ESR and ESL in Digital Decoupling Applications
Written By: Jeffrey Cain, Ph.D
Abstract:
It is common place for digital integrated circuits to operate at switching frequencies of 100 MHz and above, even at the circuit board level. As these frequencies continue to increase, the parasitic of the decoupling capacitors must be considered. A study on the effects of equivalent series resistance (ESR) and equivalent series inductance (ESL) in a typical digital decoupling application is presented. Utilizing SPICE, it can be shown that the ESR and ESL of chip capacitors can dramatically alter the voltage seen by the integrated circuit (IC). By changing the values of the parasitics and comparing the results to the ideal case for a variety of frequencies, some common decoupling design rules are formulated.
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It is common place for digital integrated circuits to operate at switching frequencies of 100 MHz and above, even at the circuit board level. As these frequencies continue to increase, the parasitic of the decoupling capacitors must be considered. A study on the effects of equivalent series resistance (ESR) and equivalent series inductance (ESL) in a typical digital decoupling application is presented. Utilizing SPICE, it can be shown that the ESR and ESL of chip capacitors can dramatically alter the voltage seen by the integrated circuit (IC). By changing the values of the parasitics and comparing the results to the ideal case for a variety of frequencies, some common decoupling design rules are formulated.
