Reliability of MLCCs After Thermal Shock
Written By: Bharat S. Rawal | Michael Childs | Allan Cooper | Bill McLaughlin
Abstract:
With increasing use of multilayer ceramic capacitors in surface mount applications, the understanding of thermal shock properties of these devices is becoming increasingly important. Of the various soldering techniques utilized in surface mount applications, including wave soldering, vapor phase and infra red reflow techniques, wave soldering imposes the most severe thermal stresses on the MLCs. To simulate this process, parts are often dipped in solder baths. It will be shown in this paper that properties like critical stress intensity factor K1C, thermal diffusivity, Young’s modulus and the chip geometry are important for understanding the thermal shock behavior of chips. Examples of effects of K1C and chip geometry will be shown.
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With increasing use of multilayer ceramic capacitors in surface mount applications, the understanding of thermal shock properties of these devices is becoming increasingly important. Of the various soldering techniques utilized in surface mount applications, including wave soldering, vapor phase and infra red reflow techniques, wave soldering imposes the most severe thermal stresses on the MLCs. To simulate this process, parts are often dipped in solder baths. It will be shown in this paper that properties like critical stress intensity factor K1C, thermal diffusivity, Young’s modulus and the chip geometry are important for understanding the thermal shock behavior of chips. Examples of effects of K1C and chip geometry will be shown.
